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267
code/machine/translate.cc
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267
code/machine/translate.cc
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// translate.cc
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// Routines to translate virtual addresses to physical addresses.
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// Software sets up a table of legal translations. We look up
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// in the table on every memory reference to find the true physical
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// memory location.
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//
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// Two types of translation are supported here.
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//
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// Linear page table -- the virtual page # is used as an index
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// into the table, to find the physical page #.
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//
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// Translation lookaside buffer -- associative lookup in the table
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// to find an entry with the same virtual page #. If found,
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// this entry is used for the translation.
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// If not, it traps to software with an exception.
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//
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// In practice, the TLB is much smaller than the amount of physical
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// memory (16 entries is common on a machine that has 1000's of
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// pages). Thus, there must also be a backup translation scheme
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// (such as page tables), but the hardware doesn't need to know
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// anything at all about that.
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//
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// Note that the contents of the TLB are specific to an address space.
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// If the address space changes, so does the contents of the TLB!
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//
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// DO NOT CHANGE -- part of the machine emulation
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//
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// Copyright (c) 1992-1993 The Regents of the University of California.
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// All rights reserved. See copyright.h for copyright notice and limitation
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// of liability and disclaimer of warranty provisions.
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#include "copyright.h"
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#include "machine.h"
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#include "addrspace.h"
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#include "system.h"
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// Routines for converting Words and Short Words to and from the
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// simulated machine's format of little endian. These end up
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// being NOPs when the host machine is also little endian (DEC and Intel).
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unsigned int
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WordToHost(unsigned int word) {
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#ifdef HOST_IS_BIG_ENDIAN
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register unsigned long result;
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result = (word >> 24) & 0x000000ff;
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result |= (word >> 8) & 0x0000ff00;
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result |= (word << 8) & 0x00ff0000;
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result |= (word << 24) & 0xff000000;
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return result;
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#else
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return word;
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#endif /* HOST_IS_BIG_ENDIAN */
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}
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unsigned short
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ShortToHost(unsigned short shortword) {
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#ifdef HOST_IS_BIG_ENDIAN
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register unsigned short result;
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result = (shortword << 8) & 0xff00;
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result |= (shortword >> 8) & 0x00ff;
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return result;
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#else
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return shortword;
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#endif /* HOST_IS_BIG_ENDIAN */
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}
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unsigned int
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WordToMachine(unsigned int word) { return WordToHost(word); }
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unsigned short
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ShortToMachine(unsigned short shortword) { return ShortToHost(shortword); }
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//----------------------------------------------------------------------
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// Machine::ReadMem
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// Read "size" (1, 2, or 4) bytes of virtual memory at "addr" into
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// the location pointed to by "value".
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//
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// Returns FALSE if the translation step from virtual to physical memory
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// failed.
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//
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// "addr" -- the virtual address to read from
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// "size" -- the number of bytes to read (1, 2, or 4)
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// "value" -- the place to write the result
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//----------------------------------------------------------------------
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bool
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Machine::ReadMem(int addr, int size, int *value, bool debug)
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{
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int data;
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ExceptionType exception;
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int physicalAddress;
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if (debug)
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DEBUG('a', "Reading VA 0x%x, size %d\n", addr, size);
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exception = Translate(addr, &physicalAddress, size, FALSE, debug);
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if (exception != NoException) {
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machine->RaiseException(exception, addr);
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return FALSE;
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}
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switch (size) {
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case 1:
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data = machine->mainMemory[physicalAddress];
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*value = data;
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break;
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case 2:
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data = *(unsigned short *) &machine->mainMemory[physicalAddress];
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*value = ShortToHost(data);
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break;
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case 4:
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data = *(unsigned int *) &machine->mainMemory[physicalAddress];
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*value = WordToHost(data);
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break;
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default: ASSERT(FALSE);
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}
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if (debug)
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DEBUG('a', "\tvalue read = %8.8x\n", *value);
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return (TRUE);
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}
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bool
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Machine::ReadMem(int addr, int size, int *value)
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{
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return ReadMem(addr, size, value, TRUE);
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}
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//----------------------------------------------------------------------
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// Machine::WriteMem
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// Write "size" (1, 2, or 4) bytes of the contents of "value" into
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// virtual memory at location "addr".
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//
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// Returns FALSE if the translation step from virtual to physical memory
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// failed.
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//
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// "addr" -- the virtual address to write to
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// "size" -- the number of bytes to be written (1, 2, or 4)
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// "value" -- the data to be written
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//----------------------------------------------------------------------
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bool
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Machine::WriteMem(int addr, int size, int value)
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{
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ExceptionType exception;
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int physicalAddress;
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DEBUG('a', "Writing VA 0x%x, size %d, value 0x%x\n", addr, size, value);
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exception = Translate(addr, &physicalAddress, size, TRUE, TRUE);
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if (exception != NoException) {
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machine->RaiseException(exception, addr);
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return FALSE;
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}
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switch (size) {
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case 1:
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machine->mainMemory[physicalAddress] = (unsigned char) (value & 0xff);
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break;
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case 2:
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*(unsigned short *) &machine->mainMemory[physicalAddress]
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= ShortToMachine((unsigned short) (value & 0xffff));
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break;
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case 4:
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*(unsigned int *) &machine->mainMemory[physicalAddress]
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= WordToMachine((unsigned int) value);
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break;
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default: ASSERT(FALSE);
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}
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return TRUE;
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}
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//----------------------------------------------------------------------
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// Machine::Translate
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// Translate a virtual address into a physical address, using
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// either a page table or a TLB. Check for alignment and all sorts
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// of other errors, and if everything is ok, set the use/dirty bits in
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// the translation table entry, and store the translated physical
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// address in "physAddr". If there was an error, returns the type
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// of the exception.
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//
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// "virtAddr" -- the virtual address to translate
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// "physAddr" -- the place to store the physical address
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// "size" -- the amount of memory being read or written
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// "writing" -- if TRUE, check the "read-only" bit in the TLB
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//----------------------------------------------------------------------
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ExceptionType
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Machine::Translate(int virtAddr, int* physAddr, int size, bool writing, bool debug)
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{
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int i;
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unsigned int vpn, offset;
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TranslationEntry *entry;
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unsigned int pageFrame;
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if (debug) DEBUG('a', "\tTranslate 0x%x, %s: ", virtAddr, writing ? "write" : "read");
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// check for alignment errors
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if (((size == 4) && (virtAddr & 0x3)) || ((size == 2) && (virtAddr & 0x1))){
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if (debug) DEBUG('a', "alignment problem at %d, size %d!\n", virtAddr, size);
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return AddressErrorException;
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}
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// we must have either a TLB or a page table, but not both!
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ASSERT(tlb == NULL || currentPageTable == NULL);
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ASSERT(tlb != NULL || currentPageTable != NULL);
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// calculate the virtual page number, and offset within the page,
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// from the virtual address
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vpn = (unsigned) virtAddr / PageSize;
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offset = (unsigned) virtAddr % PageSize;
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if (tlb == NULL) { // => page table => vpn is index into table
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if (vpn >= currentPageTableSize) {
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if (debug) DEBUG('a', "virtual page # %d too large for page table size %d!\n",
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virtAddr, currentPageTableSize);
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return AddressErrorException;
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} else if (!currentPageTable[vpn].valid) {
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if (debug) DEBUG('a', "virtual page # %d : page %d is invalid !\n",
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virtAddr, vpn);
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return PageFaultException;
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}
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entry = ¤tPageTable[vpn];
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} else {
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for (entry = NULL, i = 0; i < TLBSize; i++)
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if (tlb[i].valid && (tlb[i].virtualPage == vpn)) {
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entry = &tlb[i]; // FOUND!
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break;
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}
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if (entry == NULL) { // not found
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if (debug) DEBUG('a', "*** no valid TLB entry found for this virtual page!\n");
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return PageFaultException; // really, this is a TLB fault,
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// the page may be in memory,
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// but not in the TLB
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}
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}
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if (entry->readOnly && writing) { // trying to write to a read-only page
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if (tlb == NULL) {
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if (debug) DEBUG('a', "%d mapped read-only in page table!\n", virtAddr);
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} else {
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if (debug) DEBUG('a', "%d mapped read-only at %d in TLB!\n", virtAddr, i);
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}
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return ReadOnlyException;
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}
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pageFrame = entry->physicalPage;
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// if the pageFrame is too big, there is something really wrong!
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// An invalid translation was loaded into the page table or TLB.
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if (pageFrame >= NumPhysPages) {
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if (debug) DEBUG('a', "*** frame %d > %d!\n", pageFrame, NumPhysPages);
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return BusErrorException;
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}
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entry->use = TRUE; // set the use, dirty bits
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if (writing)
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entry->dirty = TRUE;
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*physAddr = pageFrame * PageSize + offset;
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ASSERT((*physAddr >= 0) && ((*physAddr + size) <= MemorySize));
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if (debug) DEBUG('a', "phys addr = 0x%x\n", *physAddr);
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return NoException;
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}
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